What, you don’t have a special command to Compare Unsigned values in register C vs result register K? or Floating-point Addition with Parenthesis, so store the value for use on the next cycle?
Just lie. What are they going to do? They don’t know enought to realize they made an impossible request, they won’t be able to tell the difference between 10 and 5 years experience.
I still don’t know why this architecture went for a Double XOR as the NOP, I guess they were just flexing that the reference chip design could do both in a single cycle
You are not logged in. However you can subscribe from another Fediverse account, for example Lemmy or Mastodon. To do this, paste the following into the search field of your instance: !programmerhumor@lemmy.ml
Post funny things about programming here! (Or just rant about your favourite programming language.)
Rules:
Posts must be relevant to programming, programmers, or computer science.
No NSFW content.
Jokes must be in good taste. No hate speech, bigotry, etc.
What, you don’t have a special command to Compare Unsigned values in register C vs result register K? or Floating-point Addition with Parenthesis, so store the value for use on the next cycle?
I’m pretty sure fused add multiply with store is part of the AVX instruction set.
Its been in RISC V for decades.
I wouldn’t really characterize fourteen years as “decades.”
IT years are similar to dog years, an IT year is multiple normal human years, so 14 IT years is certainly IT decades.
algernon nods sagely
“Algernon”? The monkey in your PFP? The nerdy kid in Canis Canem Edit a.k.a. Bully?
THAT’S how I’m supposed to get ten years of experience in a five year old technology
Just lie. What are they going to do? They don’t know enought to realize they made an impossible request, they won’t be able to tell the difference between 10 and 5 years experience.
Just don’t work there, seems like a company run by idiots
STEP 1: find company run by idiots
STEP 2: get them to give me a remote job
STEP 3: barely work at all
STEP 4: get second remote job and collect 2 paychecks
I still don’t know why this architecture went for a Double XOR as the NOP, I guess they were just flexing that the reference chip design could do both in a single cycle
When returning from kernel code, one should issue Drop Execution Ring Privileges, of course.